PCIe has been around since 2004. It’s a high-speed serial computer expansion bus specification that replaces older PCI and PCI-X standards. PCIe currently supports the Generation 4 specification. In ...

first half wave and a second half wave representing the received RF signal.

The move to 400GbE has benefits beyond the obvious fact that it's four times faster than 100GbE. The standard provides a lower price-per-port from its denser structure and improved economy of scale. A ...

Races, missed next-state values due to long paths, and metastability can result from corrupted clock signals. This post describes the challenges of clock network and clock jitter analysis in more ...

The importance of timing requirements and jitter budgets for FPGAs, ASICs, and SoCs. How to utilize the information portrayed in a clock tree to choose the most well-suited clock generator for your ...

Occasionally you might need a simple clock module for various projects. A small CMOS clock module, such as the one presented here, is not capable of offering as much precision as a clock module built ...