Engineers targeting DSP to FPGAs have traditionally used fixed-point arithmetic, mainly because of the high cost associated with implementing floating-point arithmetic. That cost comes in the form of ...

I am working on a viewshed* algorithm that does some floating point arithmetic. The algorithm sacrifices accuracy for speed and so only builds an approximate viewshed. The algorithm iteratively ...

Munich, Germany — Infineon Technologies AG has added a floating-point maths unit (FPU) to its library of system design blocks supporting the TriCore processor core. The addition of an FPU will improve ...

Three new digital signal controllers (DSCs) from Texas Instruments promise to boost system performance, while simplifying software development for solar-power inverters and various types of industrial ...