Design-Reuse

Quartus II Software Version 9.0 Delivers Productivity Leadership for Altera's Portfolio of Transceiver FPGAs and HardCopy ASICs

New SSN Analyzer Tool—Provides designer feedback on potential simultaneous switching noise (SSN) violations during pin assignments, enabling faster board design and improving signal integrity.
Electronics Weekly

Altera speeds FPGA recompile with Quartus II software

Altera has announced the release of the latest version of its Quartus II development software for CPLD, FPGA and HardCopy Asic designs. Version 10.0 of the software includes support for Altera’s 28-nm ...
EDN

Altera’s Quartus II Software Version 10.0 Delivers Unprecedented Performance and Productivity for High-End FPGAs

SAN JOSE, Calif., July 6 /PRNewswire-FirstCall/ — Altera Corporation (Nasdaq: ALTR) today announced the release of its Quartus® II development software version 10. ...
Design-Reuse

Altera Quartus II Software v13.1 Delivers Up to 70 Percent Reduction in Compile Times

San Jose, Calif., November 5 2013—Altera Corporation (NASDAQ: ALTR) today announced the release of its Quartus® II software version 13.1, extending its industry leadership in software productivity ...