EDN

Flip-Flop Using CMOS NAND Gates

Using just two NAND or inverter gates its possible to build a D type (or ‘toggle’) flip-flop with a push-button input. At power-up the output of gate N2 is at a logical ‘1’, ensuring that transistor T2 ...
Ars Technica

Samsung’s “3D Vertical” NAND crams a terabit on a single chip

SSD enthusiasts know all about SLC, MLC, and TLC, but there are some new acronyms in SSD town: V-NAND and CTF. Samsung announced in a press release last night that it has begun mass production of “3D ...
EDN

Samsung Electronics Develops First 16-Gigabit NAND Memory Using 50-nm Technology for Sharp Jump in Mobile Storage CapacitySamsung Electronics Develops First 16-Gigabit NAND Memory

Samsung Electronics Develops First 16-Gigabit NAND Memory Using 50-nm Technology for Sharp Jump in Mobile Storage CapacitySamsung Electronics Develops First 16-Gigabit NAND Memory Samsung Electronics ...
Fudzilla

Macronix comes up with new 3D NAND structure

Macronix is releasing details of a new 3D NAND structure, called single-gate vertical channel (SGVC). The outfit will present a paper on the new tech at the 2017 IEEE International Electron Devices ...
Computerworld

Today’s NAND flash has hit a development dead-end

The NAND flash technology that Toshiba introduced in 1989, making thumb drives, SSDs and your smartphone’s memory possible, has finally reached a development dead end. Toshiba and other major ...
Ars Technica

Intel is keeping Moore’s Law alive by making bigger improvements less often

Intel took half a day this week to talk about processor manufacturing technology. The company still believes in Moore's Law and says the principle will continue to guide and shape the microchip ...