IEEE

Accelerating CRS Format Conversion for Sparse Matrix Computation with an FPGA

Abstract: The Compressed Row Storage (CRS) format is widely used to enhance memory efficiency in sparse matrix computations. Still, its conversion process remains a significant performance bottleneck ...
IEEE

Modified Compressed Sparse Row Format for Accelerated FPGA-Based Sparse Matrix Multiplication

Abstract: This contribution presents a new Modified Compressed Sparse Row (MCSR) format designed for multi-core FPGA-based hardware accelerators for the calculation of Sparse Matrix Vector ...
GitHub

ML-KEM / CRYSTALS-Kyber Python Implementation

Note: This project accompanies dilithium-py which is a pure-python implementation of ML-DSA and CRYSTALS-Dilithium and shares a lot of the lower-level code of this implementation. kyber-py has been ...
GitHub

make Iteration Node array output format configurable (flatten vs nested)

1. Is this request related to a challenge you're experiencing? Tell me about your story. Currently, the Iteration Node returns arrays in a flattened format rather than a nested structure. This ...